Source code for rsrtx.Implementations.Cdr.Hardware

from ....Internal.Core import Core
from ....Internal.CommandsGroup import CommandsGroup
from ....Internal import Conversions
from .... import enums


# noinspection PyPep8Naming,PyAttributeOutsideInit,SpellCheckingInspection
class HardwareCls:
	"""
	| Commands in total: 9
	| Subgroups: 3
	| Direct child commands: 3
	"""

	def __init__(self, core: Core, parent):
		self._core = core
		self._cmd_group = CommandsGroup("hardware", core, parent)

	@property
	def brEstimate(self):
		"""
		| Commands in total: 1
		| Subgroups: 0
		| Direct child commands: 1
		"""
		if not hasattr(self, '_brEstimate'):
			from .BrEstimate import BrEstimateCls
			self._brEstimate = BrEstimateCls(self._core, self._cmd_group)
		return self._brEstimate

	@property
	def prsStandard(self):
		"""
		| Commands in total: 1
		| Subgroups: 0
		| Direct child commands: 1
		"""
		if not hasattr(self, '_prsStandard'):
			from .PrsStandard import PrsStandardCls
			self._prsStandard = PrsStandardCls(self._core, self._cmd_group)
		return self._prsStandard

	@property
	def pll(self):
		"""
		| Commands in total: 4
		| Subgroups: 0
		| Direct child commands: 4
		"""
		if not hasattr(self, '_pll'):
			from .Pll import PllCls
			self._pll = PllCls(self._core, self._cmd_group)
		return self._pll

[docs] def get_sam_time(self) -> float: """ ``CDR:HARDware:SAMTime`` \n Snippet: ``value: float = driver.cdr.hardware.get_sam_time()`` \n Sets a sampling time for the clock signal, an offset for the clock edge in relation to the bit start. The clock edge sets the beginning of the unit interval. The sampling time is a number between 0 and 1. Value 0 sets the clock edge to the beginning of the bit period; value 0.5 sets the clock edge to the middle of the bit period. :return: unt_intvl_offs: 0 to 1 """ response = self._core.io.query_str_with_opc('CDR:HARDware:SAMTime?') return Conversions.str_to_float(response)
[docs] def set_sam_time(self, unt_intvl_offs: float) -> None: """ ``CDR:HARDware:SAMTime`` \n Snippet: ``driver.cdr.hardware.set_sam_time(unt_intvl_offs = 1.0)`` \n Sets a sampling time for the clock signal, an offset for the clock edge in relation to the bit start. The clock edge sets the beginning of the unit interval. The sampling time is a number between 0 and 1. Value 0 sets the clock edge to the beginning of the bit period; value 0.5 sets the clock edge to the middle of the bit period. :param unt_intvl_offs: 0 to 1 """ param = Conversions.decimal_value_to_str(unt_intvl_offs) self._core.io.write_with_opc(f'CDR:HARDware:SAMTime {param}')
[docs] def get_bitrate(self) -> float: """ ``CDR:HARDware:BITRate`` \n Snippet: ``value: float = driver.cdr.hardware.get_bitrate()`` \n Sets the frequency of the feed forward CDR. It corresponds to the data rate of the data stream from which the clock is to be recovered. :return: bitrate: 200E+3 to 2.5E+9 for 10 GSa/s; range depends on sample rate """ response = self._core.io.query_str_with_opc('CDR:HARDware:BITRate?') return Conversions.str_to_float(response)
[docs] def set_bitrate(self, bitrate: float) -> None: """ ``CDR:HARDware:BITRate`` \n Snippet: ``driver.cdr.hardware.set_bitrate(bitrate = 1.0)`` \n Sets the frequency of the feed forward CDR. It corresponds to the data rate of the data stream from which the clock is to be recovered. :param bitrate: 200E+3 to 2.5E+9 for 10 GSa/s; range depends on sample rate """ param = Conversions.decimal_value_to_str(bitrate) self._core.io.write_with_opc(f'CDR:HARDware:BITRate {param}')
# noinspection PyTypeChecker
[docs] def get_eslope(self) -> enums.Edge: """ ``CDR:HARDware:ESLope`` \n Snippet: ``value: enums.Edge = driver.cdr.hardware.get_eslope()`` \n Selects the edges of the data stream that are used for the clock recovery. The acquisition and average count has a double effect: \n - Either: Both positive and negative edges are used. - Positive or Negative: Only one edge direction is used. Use one of these settings if the other edge delivers unreliable results. :return: edge: POSitive | NEGative | EITHer """ response = self._core.io.query_str_with_opc('CDR:HARDware:ESLope?') return Conversions.str_to_scalar_enum(response, enums.Edge)
[docs] def set_eslope(self, edge: enums.Edge) -> None: """ ``CDR:HARDware:ESLope`` \n Snippet: ``driver.cdr.hardware.set_eslope(edge = enums.Edge.EITHer)`` \n Selects the edges of the data stream that are used for the clock recovery. The acquisition and average count has a double effect: \n - Either: Both positive and negative edges are used. - Positive or Negative: Only one edge direction is used. Use one of these settings if the other edge delivers unreliable results. :param edge: POSitive | NEGative | EITHer """ param = Conversions.enum_scalar_to_str(edge, enums.Edge) self._core.io.write_with_opc(f'CDR:HARDware:ESLope {param}')
def clone(self) -> 'HardwareCls': """ Clones the group by creating new object from it and its whole existing subgroups. Also copies all the existing default Repeated Capabilities setting, which you can change independently without affecting the original group. """ new_group = HardwareCls(self._core, self._cmd_group.parent) self._cmd_group.synchronize_repcaps(new_group) return new_group