from ....Internal.Core import Core
from ....Internal.CommandsGroup import CommandsGroup
from ....Internal import Conversions
from .... import repcap
# noinspection PyPep8Naming,PyAttributeOutsideInit,SpellCheckingInspection
class CasWriteCls:
"""
| Commands in total: 1
| Subgroups: 0
| Direct child commands: 1
"""
def __init__(self, core: Core, parent):
self._core = core
self._cmd_group = CommandsGroup("casWrite", core, parent)
[docs]
def set(self, cas_latency_write: float, bus=repcap.Bus.Default) -> None:
"""
``BUS<*>:DDR:CASWrite`` \n
Snippet: ``driver.bus.ddr.casWrite.set(cas_latency_write = 1.0, bus = repcap.Bus.Default)`` \n
Sets the CAS write latency (CWL) , the delay between the time a write command is issued to the memory and the time the
data is actually written to the memory cells. It is measured in clock cycles.
:param cas_latency_write: 0 to 4.29497E+9
:param bus: optional repeated capability selector. Default value: Nr1 (settable in the interface 'Bus')
"""
param = Conversions.decimal_value_to_str(cas_latency_write)
bus_cmd_val = self._cmd_group.get_repcap_cmd_value(bus, repcap.Bus)
self._core.io.write_with_opc(f'BUS{bus_cmd_val}:DDR:CASWrite {param}')
[docs]
def get(self, bus=repcap.Bus.Default) -> float:
"""
``BUS<*>:DDR:CASWrite`` \n
Snippet: ``value: float = driver.bus.ddr.casWrite.get(bus = repcap.Bus.Default)`` \n
Sets the CAS write latency (CWL) , the delay between the time a write command is issued to the memory and the time the
data is actually written to the memory cells. It is measured in clock cycles.
:param bus: optional repeated capability selector. Default value: Nr1 (settable in the interface 'Bus')
:return: cas_latency_write: 0 to 4.29497E+9
"""
bus_cmd_val = self._cmd_group.get_repcap_cmd_value(bus, repcap.Bus)
response = self._core.io.query_str_with_opc(f'BUS{bus_cmd_val}:DDR:CASWrite?')
return Conversions.str_to_float(response)